As semiconductor devices scale to smaller dimensions, a need has arisen to more accurately define and control the dimensions and shapes of photoresist (resist) features used to pattern substrates. Various techniques have been developed to treat photoresist features after the photoresist features are formed, but before the photoresist features are used to pattern a substrate. The treatment may be used, for example, to control the shape and roughness for photoresist features. Etch has been known to improve line edge roughness (LER) and/or line width roughness (LWR) during the patterning process, but there exists a limit to how much etch can improve LER/LWR.